Voltage regulators typically have a finite transient response capability. Linear regulators may be limited by bandwidth and pass device size. As a result of this, linear regulators may exhibit voltage drops or voltage peaks, subject to load transients of a load connected to an output of the voltage regulator.
As possible approach to reducing such voltage drops or voltage peaks is the use of an output capacitor for the provision of additional load current and/or for the storage of excessive current at the output of the regulator. Such output capacitors typically lead to additional costs and additional space requirements.
The present document addresses the above mentioned technical problem. In particular, the present document describes a voltage regulator and a corresponding method for reducing the error voltage Verror of the voltage regulator, subject to a load transient, without the need of (substantial) output capacitors.